Ply shift/reduce conflicts: dangling else and empty productions
问题 I had lots of conflicts, most of them were due to operators and relational operators which had different precedences. But I still face some conflicts that I don't really know how to tackle them. some of them are below. I suspect that maybe I should do epsilon elimination for stmtlist but to be honest I'm not sure about it. state 70: state 70 (27) block -> LCB varlist . stmtlist RCB (25) varlist -> varlist . vardec (28) stmtlist -> . stmt (29) stmtlist -> . stmtlist stmt (30) stmtlist -> . (15