cpu-mds

问题 I was reading the MDS attack paper RIDL: Rogue In-Flight Data Load. They discuss how the Line Fill Buffer can cause leakage of data. There is the About the RIDL vulnerabilities and the "replaying" of loads question that discusses the micro-architectural details of the exploit. One thing that isn't clear to me after reading that question is why we need a Line Fill Buffer if we already have a store buffer. John McCalpin discusses how the store buffer and Line Fill Buffer are connected in How

问题 I'm trying to understand the RIDL class of vulnerability. This is a class of vulnerabilities that is able to read stale data from various micro-architectural buffers. Today the known vulnerabilities exploits: the LFBs, the load ports, the eMC and the store buffer. The paper linked is mainly focused on LFBs. I don't understand why the CPU would satisfy a load with the stale data in an LFB. I can imagine that if a load hits in L1d it is internally "replayed" until the L1d brings data into an