How to properly use TSX-NI (both HLE and RTM) when threads might switch cores?
问题 It seems that Intel's Transactional Synchronization Extensions (TSX-NI) work on a per-CPU basis. This applies to both the _InterlockedXxx_HLE{Acquire,Release} Hardware Lock Elision functions (HLE), as well as for the _xbegin / _xend /etc. Restricted Transactional Memory (RTM) functions. What is the "proper" way to use these functions on multi-core systems? Given their correctness guarantees, I assume I only need to be worried about performance here. So, how should I structure & write my code