avx512

问题 I am looking for an optimal method to calculate sum of all packed 32-bit integers in a __m256i or __m512i . To calculate sum of n elements, I ofter use log2(n) vpaddd and vpermd function, then extract the final result. Howerver, it is not the best option I think. Edit: best/optimal in term of speed/cycle reduction. 回答1: (Related: if you're looking for the non-existant _mm512_reduce_add_epu8 , see Summing 8-bit integers in __m512i with AVX intrinsics; vpsadbw as an hsum within qwords is much

问题 I am looking for an optimal method to calculate sum of all packed 32-bit integers in a __m256i or __m512i . To calculate sum of n elements, I ofter use log2(n) vpaddd and vpermd function, then extract the final result. Howerver, it is not the best option I think. Edit: best/optimal in term of speed/cycle reduction. 回答1: (Related: if you're looking for the non-existant _mm512_reduce_add_epu8 , see Summing 8-bit integers in __m512i with AVX intrinsics; vpsadbw as an hsum within qwords is much

问题 I am looking for an optimal method to calculate sum of all packed 32-bit integers in a __m256i or __m512i . To calculate sum of n elements, I ofter use log2(n) vpaddd and vpermd function, then extract the final result. Howerver, it is not the best option I think. Edit: best/optimal in term of speed/cycle reduction. 回答1: (Related: if you're looking for the non-existant _mm512_reduce_add_epu8 , see Summing 8-bit integers in __m512i with AVX intrinsics; vpsadbw as an hsum within qwords is much

问题 The instruction exists ( vbroadcastss zmm/m32 ) but there seems to be no intrinsic to generate it. I can code it as static inline __m512 mybroadcast(float *x) { __m512 v; asm inline ( "vbroadcastss %1,%0 " : "=v" (v) : "m" (*x) ); return v; } Is there a way to do this without inline asm? 回答1: I think _mm512_set1_ps is what you want. https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_set1_ps&expand=5236,4980 来源： https://stackoverflow.com/questions/59128802/is-there-an

问题 I have a process running on an Intel machine that supports AVX-512, but this process doesn't directly use any AVX-512 instructions (asm or intrinsics) and is compiled with -mno-avx512f so that the compiler doesn't insert any AVX-512 instructions. Yet, it is running indefinitely at the reduced AVX turbo frequency. No doubt there is an AVX-512 instruction sneaking in somewhere, via a library, (very unlikely) system call or something like that. Rather than try to "binary search" down where the

问题 I have a process running on an Intel machine that supports AVX-512, but this process doesn't directly use any AVX-512 instructions (asm or intrinsics) and is compiled with -mno-avx512f so that the compiler doesn't insert any AVX-512 instructions. Yet, it is running indefinitely at the reduced AVX turbo frequency. No doubt there is an AVX-512 instruction sneaking in somewhere, via a library, (very unlikely) system call or something like that. Rather than try to "binary search" down where the

问题 I was inspired by this link https://www.sigarch.org/simd-instructions-considered-harmful/ to look into how AVX512 performs. My idea was that the clean up loop after the loop could be removed using the AVX512 mask operations. Here is the code I am using void daxpy2(int n, double a, const double x[], double y[]) { __m512d av = _mm512_set1_pd(a); int r = n&7, n2 = n - r; for(int i=-n2; i<0; i+=8) { __m512d yv = _mm512_loadu_pd(&y[i+n2]); __m512d xv = _mm512_loadu_pd(&x[i+n2]); yv = _mm512_fmadd

问题 I was inspired by this link https://www.sigarch.org/simd-instructions-considered-harmful/ to look into how AVX512 performs. My idea was that the clean up loop after the loop could be removed using the AVX512 mask operations. Here is the code I am using void daxpy2(int n, double a, const double x[], double y[]) { __m512d av = _mm512_set1_pd(a); int r = n&7, n2 = n - r; for(int i=-n2; i<0; i+=8) { __m512d yv = _mm512_loadu_pd(&y[i+n2]); __m512d xv = _mm512_loadu_pd(&x[i+n2]); yv = _mm512_fmadd

问题 Intel's intrinsic guide lists the intrinsic _mm256_loadu_epi32: _m256i _mm256_loadu_epi32 (void const* mem_addr); /* Instruction: vmovdqu32 ymm, m256 CPUID Flags: AVX512VL + AVX512F Description Load 256-bits (composed of 8 packed 32-bit integers) from memory into dst. mem_addr does not need to be aligned on any particular boundary. Operation a[255:0] := MEM[mem_addr+255:mem_addr] dst[MAX:256] := 0 */ But clang and gcc do not provide this intrinsic. Instead they provide (in file avx512vlintrin

问题 Say, I want to clear 4 zmm registers. Will the following code provide the fastest speed? vpxorq zmm0, zmm0, zmm0 vpxorq zmm1, zmm1, zmm1 vpxorq zmm2, zmm2, zmm2 vpxorq zmm3, zmm3, zmm3 On AVX2, if I wanted to clear ymm registers, vpxor was fastest, faster than vxorps, since vpxor could run on multiple units. On AVX512, we don't have vpxor for zmm registers, only vpxorq and vpxord. Is that an efficient way to clear a register? Is the CPU smart enough to not make false dependencies on previous