arm

How to OR all lane of a NEON vector

由 自古美人都是妖i 提交于 2020-01-25 07:49:06
问题 I want to use NEON intrinsics to optimize the following code. uint32x4_t c1; // 4 elements, each element is 0 or 1 uint32x4_t c2; // 4 elements, each element is 0 or 1 uint8_t pack = 0; // unsigned char, for result /* some code /* // need optimizing pack |= (vgetq_lane_u32(c1, 0); pack |= (vgetq_lane_u32(c1, 1) << 1; pack |= (vgetq_lane_u32(c1, 2) << 2; pack |= (vgetq_lane_u32(c1, 3) << 3; pack |= (vgetq_lane_u32(c2, 0) << 4; pack |= (vgetq_lane_u32(c2, 1) << 5; pack |= (vgetq_lane_u32(c2, 2)

AOSP non-obvious syscall() implementation

由 …衆ロ難τιáo~ 提交于 2020-01-24 22:46:08
问题 As far as I know Linux ABI for ARM states that syscall return value is passed via r0 and if it is negative it should be threaded as errno value negated. I.e syscall has ended up with some error. AOSP does this check in some fancy way: ENTRY(syscall) mov ip, sp stmfd sp!, {r4, r5, r6, r7} .cfi_def_cfa_offset 16 .cfi_rel_offset r4, 0 .cfi_rel_offset r5, 4 .cfi_rel_offset r6, 8 .cfi_rel_offset r7, 12 mov r7, r0 mov r0, r1 mov r1, r2 mov r2, r3 ldmfd ip, {r3, r4, r5, r6} swi #0 ldmfd sp!, {r4, r5

Converting GCC assembly code to armasm assembly code

由 泄露秘密 提交于 2020-01-24 21:16:48
问题 I am trying to convert GCC assembly code to ARMASM assembly code can anyone please help me with this. The main problem is .req .unreq .qn.dn . I wanted to know the equivalents of the above directives. I tried ALIAS it did not work. .align 4 .global ne10_fir_float_neon .extern ne10_qMaskTable32 .thumb .thumb_func ne10_fir_float_neon: PUSH {r4-r12,lr} @push r12: to keep stack 8 bytes aligned @/*ARM Registers*/ pStateStruct .req R0 pSrc .req R1 pDst .req R2 blockSize .req R3 pState .req R4 @/*

arm neon 一些官方资料，免费送！

由 邮差的信 提交于 2020-01-24 08:47:31
链接：https://pan.baidu.com/s/1XOU92aBYM4xXq6XcrC7Ixg 提取码：1a8j DEN0018A_neon_programmers_guide_en.pdf DUI0202IC_rvct_essentials_guide.pdf DUI0203J_rvct_developer_guide.pdf DUI0204IC_rvct_assembler_guide.pdf DUI0205IC_rvct_comp_user_guide.pdf DUI0206IC_rvct_linker_user_guide.pdf DUI0348BC_rvct_comp_ref_guide.pdf DUI0349BC_rvct_libraries_guide.pdf DUI0381B_rvct_linker_ref_guide.pdf DUI0382AC_rvct_utilities_guide.pdf DUI0471H_developing_for_arm_processors.pdf DUI0472G_using_the_arm_compiler.pdf DUI0472I_using_the_arm_compiler.pdf DUI0489F_arm_assembler_reference.pdf DUI0493C_arm_linker_reference.pdf

Force GCC to access structs with words

由 倖福魔咒の 提交于 2020-01-24 05:45:06
问题 On an ARM processor (HT32F1655), a specific section of registers requires word accesses. From the user manual: Note that all peripheral registers in the AHB bus support only word access. But gcc is generating some ldrb (load byte) and strb (store byte) instructions on packed structs. The structs look something like this: typedef union { struct { uint32_t CKOUTSRC : 3; //!< CKOUT Clock Source Selection uint32_t : 5; uint32_t PLLSRC : 1; //!< PLL Clock Source Selection uint32_t : 2; uint32_t

Linux源码学习三、vmlinux.lds.S、MRC/MCR协处理器寄存器指令和head.S文件分析

由 微笑、不失礼 提交于 2020-01-24 02:59:01
①vmlinux.lds.S文件在目录arch/arm/kernel/vmlinux.lds.S下 分析VMLINUX_SYMBOL(__proc_info_begin) = .; vmlinux.lds.S文件 的内容为： #include <asm-generic/vmlinux.lds.h> #include <asm/thread_info.h> #include <asm/memory.h> #include <asm/page.h> 分别表示include文件夹里的<>目录下的内容。 #define PROC_INFO \ VMLINUX_SYMBOL(__proc_info_begin) = .; \ *(.proc.info.init) \ VMLINUX_SYMBOL(__proc_info_end) = .; \表示连接符，一个句子太长分开连接的意思，相当于： 相当于 PROC_INFO 代表后面一长串，包含后面的分号。 VMLINUX_SYMBOL(__proc_info_begin) = .; 因为 vmlinux.lds.S文件 引入： #include <asm-generic/vmlinux.lds.h> ，在 目录include/asm-generic/vmlinux.lds.h头 文件中有部分内容为： #ifndef SYMBOL_PREFIX

Arm Board Bring Up

由 我们两清 提交于 2020-01-23 17:39:06
问题 Can anybody tell me where I can find information related to How to Bringup any arm board? I am looking for an overview as I am novice in ARM related stuffs. Any link/document will do ...It will be gr8 help if i can look for a case-study any arm based board can be considered..I am looking for just a case study...simple in few steps?? 回答1: Every single ARM "board" will be different. Read the datasheet for the ARM chip you have, that should have a section near the start about booting. Also, read

Cross-compile multi-arch containers

由 痞子三分冷 提交于 2020-01-23 12:04:32
问题 I'm trying to build an ARM (arm32v7) container, but using an x86_64 host. While I know there are some pretty cool things like Resin using Qemu shenanigans, and Multiarch for doing crossbuilding of generic containers, I have a slight issue: The container I'm trying to build starts off as multiarch, and so Docker always chooses the x86 image in the FROM instruction. I want to build an ARM container from a Multi-arch Rust image on an x86 host. The problem is, I can't find any documentation to

STM32 internal clocks

由 孤者浪人 提交于 2020-01-23 05:41:05
问题 I am confused with the clock system on my STM32F7 device (Cortex-M7 microcontroller from STMicroelectronics). The reference manual does not clarify the differences between these clocks sufficiently: SYSCLK HCLK FCLK The reference manual reads in chapter << 5.2 Clocks >> "The RCC feeds the external clock of the Cortex System Timer (SysTick) with the AHB clock (HCLK) divided by 8." This statement contradicts the figure from CubeMX. Notice that in CubeMX I can choose myself the prescaler from

EtherCAT协议介绍

由 冷暖自知 提交于 2020-01-23 02:32:42
EtherCAT协议介绍 前言 EtherCAT（Ethernet for Control Automation Technology）是一种基于以太网的开发构架的实时工业现场总线通讯协议，它于2003年被引入市场，于2007年成为国际标准，并于2014年成为中国国家标准。EtherCAT的出现为系统的实时性能和拓扑的灵活性树立了新的标准。 1）EtherCAT是最快的工业以太网技术之一，同时它提供纳秒级精确同步。相对于设置了相同循环时间的其他总线系统，EtherCAT系统结构通常能减少25%-30%的CPU负载。 2）EtherCAT在网络拓扑结构方面没有任何限制，最多65535个节点可以组成线型、总线型、树型、星型或者任意组合的拓扑结构。 3）相对于传统的现场总线系统，EtherCAT节点地址可被自动设置，无需网络调试，集成的诊断信息可以精确定位到错误。同时无需配置交换机，无需处理复杂的MAC或者IP地址。 4）EtherCAT主站设备无需特殊插卡，从站设备使用可以由多个供应商提供的高集成度、低成本的芯片。 5）利用分布时钟的精确校准EtherCAT提供了有效的同步解决方案，在EtherCAT中，数据交换完全基于纯粹的硬件设备。由于通讯利用了逻辑环网结构和全双工快速以太网而又有实际环网结构，“主站时钟”可以简单而精确地确定对每个“从站时钟”的运行补偿，反之亦然
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