Why are there 6T states in opcode fetch of CALL instead of 4?
My question is why are there 6T states in opcode fetch of the CALL instruction while there are 4 for other instructions in 8085 microprocessor. I have searched a lot but didn't find any satisfactory answer. Here: http://www.edaboard.com/thread201650.html it says that it has something to do with dual addressing modes being used in case of CALL. But doesn't really explain why 6T states. Any idea? EDIT This question arose when I came to know that CALL takes 18 T-states. According to my calculations it should be: 4(for opcode fetch) + 3 + 3 (two memory reads to read the subroutine address) + 3 + 3