Makefile, Pattern-Rules and Directories

Question

I want to write a (gmake) makefile for a compiler that - unlike gcc - puts all output files into a specific directory. Unfortunately this behavior cannot be changed.

My

Answer 1

Extracted from some Makefile of mine:

OBJS := $(sort $(patsubst %.cpp,$(OBJECT_DIRECTORY)/%.o,$(patsubst %.c,$(OBJECT_DIRECTORY)/%.o,$(notdir $(SRCS)))))

Where OBJECT_DIRECTORY points to the object directory and SRCS is the list of source files (which you can even populate using $(wildcard)).

Then in the Makefile, I have:

define define_compile_rules
$(OBJECT_DIRECTORY)/%.o: $(1)%.c
  @echo " + Compiling '$$<'"
  @mkdir -p $$(@D)
  $(CC) $$(CFLAGS) -o $$@ -c $$<
endef

$(foreach directory,$(sort $(dir $(SRCS))),$(eval $(call define_compile_rules,$(directory))))

See the $(eval) function.