What is the difference between make and gcc?

Question

The last sentence in the article caught my eye

[F]or C/C++ developers and students interested in learning to program in C/C++ rather than users of L

Answer 1

Well ... gcc is a compiler, make is a tool to help build programs. The difference is huge. You can never build a program purely using make; it's not a compiler. What make does it introduce a separate file of "rules", that describes how to go from source code to finished program. It then interprets this file, figures out what needs to be compiled, and calls gcc for you. This is very useful for larger projects, with hundreds or thousands of source code files, and to keep track of things like compiler options, include paths, and so on.

Answer 2

gcc is a C compiler: it takes a C source file and creates machine code, either in the form of unlinked object files or as an actual executable program, which has been linked to all object modules and libraries.

make is useful for controlling the build process of a project. A typical C program consists of several modules (.c) and header files (.h). It would be time-consuming to always compile everything after you change anything, so make is designed to only compile the parts that need to be re-compiled after a change.

It does this by following rules created by the programmer. For example:

foo.o: foo.c foo.h
    cc -c foo.c

This rule tells make that the file foo.o depends on the files foo.c and foo.h, and if either of them changes, it can be built by running the command on the second line. (The above is not actual syntax: make wants the commands indented by a TAB characters, which I can't do in this editing mode. Imagine it's there, though.)

make reads its rules from a file that is usually called a Makefile. Since these files are (traditionally) written by hand, make has a lot of magic to let you shorten the rules. For example, it knows that a foo.o can be built from a foo.c, and it knows what the command to do so is. Thus, the above rule could be shortened to this:

foo.o: foo.h

A small program consisting of three modules might have a Makefile like this:

mycmd: main.o foo.o bar.o
    $(CC) $(LDFLAGS) -o mycmd main.o foo.o bar.o
foo.o: foo.h bar.h
bar.o: bar.h

make can do more than just compile programs. A typical Makefile will have a rule to clean out unwanted files:

clean:
    rm -f *.o core myapp

Another rule might run tests:

check: myapp
    ./myapp < test.input > test.output
    diff -u test.correct test.output

A Makefile might "build" documentation: run a tool to convert documentation from some markup language to HTML and PDF, for example.

A Makefile might have an install rule to copy the binary program it builds to wherever the user or system administrator wants it installed.

And so on. Since make is generic and powerful, it is typically used to automate the whole process from unpacking a source tarball to the point where the software is ready to be used by the user.

There is a whole lot of to learn about make if you want to learn it fully. The GNU version of make has particularly good documentation: http://www.gnu.org/software/make/manual/ has it in various forms.

Answer 3

gcc is a compiler like javac. You give it source files, it gives you a program.

make is a build tool. It takes a file that describes how to build the files in your project based on dependencies between files, so when you change one source file, you don't have to rebuild everything (like if you used a build script). make usually uses gcc to actually compile source files.

Answer 4

The biggest difference is that make is turing complete (Are makefiles Turing complete?) while gcc is not.

Answer 5

make is essentially an expert system for building code. You set up rules for how things are built, and what they depend on. Make can then look at the timestamps on all your files and figure out exactly what needs to be rebuilt at any time.

gcc is the "gnu compiler collection". There are many languages it supports (C, C++, Ada, etc depending on your setup), but still it is just one tool out of many that make may use to build your system.

Answer 6

Make is a tool for building any complex system where there are dependancies between the various system components, by doing the minimal amount of work necessary.

If you want to find out all the things make can be used for, the GNU make manual is excellent.