Why does instruction/data alignment exist?

Question

I frequently see information about architecturally instructions and data must be aligned to word, half-word, etc. boundaries. While it is not difficult to follow these rules, I

Answer 1

this is because of high efficient data bus design issue. With aligned memoey address, the data can fit in the data bus efficiently.

For a 32 bit word load, if it is aligned, all the 32bit data bus which connect the CPU and DRAM MEMORY.Otherwise, the computer have to use the lower part of the data bus once, and then load again using the higher part of the data bus.

What is more, the current cache architecture design also take advantage of align constraint