Does a lock force variables to be written directly to memory instead of beëing cached like volatile does? in this question Orion Edwards states that using locks is better than u
A lock introduces an acquire-fence before its first instruction, and a release-fence after its last instruction.
The acquire-fence prevents instructions within the lock from being moved backwards in time and above the lock (i.e., "cached"). (Also, notice how it doesn't prevent instructions above the lock to be moved inside the lock).
This is what the specification guarantees. The mechanism used to achieve this (e.g., preventing the processor from using a register and writing/reading directly to/from memory, cache-invalidation, etc) isn't relevant.