number of ones in array

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悲&欢浪女
悲&欢浪女 2021-01-20 05:23

I am trying to count the number of ones in a 4-bit binary number in Verilog, but my output is unexpected. I\'ve tried several approaches; this is the one I think should work

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  • 2021-01-20 06:15

    First, you can't assign the variable twice.

    Second, your range is off, 2 bits can only go from 0 to 3. You need a 3 bit output to count up to 4.

    This is more like what you need:

    module ones(
      output wire [2:0] one,
      input wire [3:0] in
    );
    
    assign one = in[3]+in[2]+in[1]+in[0] ;
    
    endmodule
    
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  • 2021-01-20 06:21

    $countones can be used for this purpose (refer to IEEE Std 1800-2012, 20.9 Bit vector system functions):

    module tb;
    
    reg [3:0] in;
    wire [2:0] one = $countones(in);
    initial begin
        $monitor("in=%b one=%d", in, one);
        #1 in = 4'b0000;
        #1 in = 4'b0001;
        #1 in = 4'b1101;
    end
    
    endmodule
    

    Output:

    in=xxxx one=0
    in=0000 one=0
    in=0001 one=1
    in=1101 one=3
    
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