I\'m trying to create a generic build template for my Makefiles, kind of like they discuss in the eval documentation.
I\'ve run into a known bug with GNU Make 3.80.
lol hacks
ifneq (3.81,$(shell (echo $(MAKE_VERSION); echo 3.81) | sort | head -n1))
make-3.81/make:
wget -nc http://ftp.gnu.org/pub/gnu/make/make-3.81.tar.gz
gzip -cd make-3.81.tar.gz | tar xvf -
cd make-3.81 && ./configure --prefix=$$(pwd)
$(MAKE) -C make-3.81 make
%: make-3.81/make
make-3.81/make $@
else
# rest of your makefile
endif
Seriously though, there can't possibly be anything preventing you from installing 3.81, even if it is only locally.
Perhaps nobody needs this any more, but I guess clever use of include
could overcome this kind of limitation.
Replace define PROGRAM_template
with something like:
define PROGRAM_template
__template_arg := $(1)
include PROGRAM_template.mk
endef
Create PROGRAM_template.mk
to implement the core of the template macro:
$(__template_arg)_SRC_DIR = $(SRC_DIR)$(__template_arg)/
$(__template_arg)_SRC_FILES = $(wildcard $($(__template_arg)_SRC_DIR)*.c)
$(__template_arg)_OBJ_FILES = $($(__template_arg)_SRC_FILES:.c=.o)
$($(__template_arg)_OBJ_FILES) : $($(__template_arg)_SRC_FILES)
__template_arg :=
Of course, this is a bit ugly (use of global variable to pass argument to what technically is a macro). I like the first answer better... :-)