VHDL entity and architecture design

Question

With Ada I can split my modular units into specification and body with .ads and .adb files.

Is it possible to separate VHDL entity and architecture? If so, is ther

Answer 1

Libraries

Everything gets compiled into a library. By default this is called "work", but you can override this. I rarely have to use that though - it's occasionally useful with external IP if there are namespace clashes. As Chiggs commented, using libraries to create namespaces is a good practice. Most synthesizers can deal with multiple libraries now, although it wasn't always the case. All the simulators can (as far as I know). There's also a bit more hassle involved in setting them up (you have to tell the compiler where they all are).

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maybe an example - say you have an i2c controller and an spi controller. You could call both blocks controller and compile them into their own libraries called i2c and spi and then instantiate them like this:

i2c_instance:entity i2c.controller...etc
spi_instance:entity spi.controller...etc

or you could call them i2c_controller and spi_controller and do:

i2c_instance:entity work.i2c_controller...etc
spi_instance:entity work.spi_controller...etc

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And libraries are not "just the same" as hard disk folders. They are managed by the VHDL compiler, so you create and map them using whatever syntax the tool uses.

For example with Modelsim, vlib creates a library at a particular place in the filesystem (so it does look like a folder at this point) and vmap tells the compiler how to map a use some_lib; clause to a particular bit of the filesystem.

Entities, architectures, packages

You can separate your entity and architecture (or even more than one architecture per entity) into multiple files, or keep them in one file. Keeping the architecture in a separate file means that when you recompile it, you don't recompile the entity, which means you don't have to recompile everything that instantiates it.

Similarly with packages and package bodys - bodies in a separate file means you can just recompile that part without recompiling everything else. Note that packages are not for putting entities in.

(Aside - Modelsim has a -just switch that allows you to keep everything in one file and just compile selected bits of the files, for example, just the architecture and/or body part(s))

Summary

• Compile re-useable cores into their own library to protect their namespace
• Compile everything else into the work library
• Put useful constants, functions, procedures, type definitions into one or more packages
• Putting entities and architectures into one or more files is a matter of taste and development style more than anything else
• Putting packages and package bodies into one or more files is a matter of taste and development style more than anything else

Answer 2

Entity and architecture are separate design units. They can be in the same file or they can be in separate files. The file extensions remain the same: usually .vhd but .vhdl is also possible. For the file names, there is no generally accepted naming convention. (There are hundreds of conventions really, so that is as useful as no convention at all) Anything works; as an example, you could use myEntity.vhd and myEntity_RTL.vhd.

You can compile entities and architectures that you write in your own library. You might use your company name as library name.

Don't confuse libraries with packages, though! A package is a compilation unit that holds reusable declarations. A library is a named set of compilation units.