I want to tell make that it shall always use -j4
option even if I didn\'t specify it vie command line. Normally i would do this in some configuration file (i.e.
I like the MAKEFLAGS
approach suggested by John Marshall in lieu of make
supporting something like an automatic .makerc project config file. However, I didn't want to have to remember to source a .env or similar environment variables beforehand (and unsetting them afterward).
A solution to this is to put the MAKEFLAGS
assignment at the top of the Makefile
itself:
#!/usr/bin/env make
MAKEFLAGS=s
.PHONY: foo
foo:
echo "hello, make"
Run it:
$ make foo
hello, make
Compared to running without the MAKEFLAGS=...
line:
$ make foo
echo "hello, make"
hello, make
Well, yes and no --- normally you would use an include file. Put your common configuration items together in a file, say common.mk
and add
include common.mk
at the top of your makefile. If the flag doesn't have a matching way to configure it from inside the make file, you can use a function
function mk {
make -j4 $*
}
I would like to expand a bit on the solution hinted in John Marshall's answer.
You can simply put a one-line wrapper script somewhere earlier in the $PATH
with the following contents:
#!/bin/bash
$(type -ap make | sed -n 2p) -j4 "$@"
(The script doesn't have to be named make
, and that would make it simpler, but I find it convenient if it is.)
I would argue that this is better than the other approaches for the following reasons:
MAKEFLAGS
approach, it does not break recursive builds (which are actually quite common in my experience).include .makerc
approach, it can be applied locally without changing any existing makefiles or your workflow in any way.Have a read about the $(MAKEFLAGS) variable:
export MAKEFLAGS=j4
However this will likely interfere with recursive-make-based builds (not that sensible people are using recursive make anyway!), by interfering with GNU make's ability to communicate with its sub-makes.
So the more sensible approach is probably a wrapper script or an alias or shell function.
It doesn't exist, but you can do this by having a recursive call into make.
For example:
Makefile:
-include $(HOME)/.makerc
.DEFAULT_GOAL: all
# This will handle a default goal if make is just called without any target
all:
$(MAKE) $(MAKE_OPTIONS) -f Makefile.real $(MAKECMDGOALS)
# This handles all targets and passes it through
%:
$(MAKE) $(MAKE_OPTIONS) -f Makefile.real $(MAKECMDGOALS)
$(HOME)/.makerc:
MAKE_OPTIONS := -j4