Problem generating dependencies in Makefile using -MM

Question

I am new to Makefiles and g++ and i am struck with a problem while generating dependencies of the project files using -MM flag. I\'m posting the Makefile i am using for your

Answer 1

For a beginner, you are doing some exotic stuff. You should start simple and only use code in your Makefile that you 100% understand and trust. Even on a large project with hundreds of files you will not spend much time maintaining the Makefile.

Variables assigned with := are immediately expanded--all the $(VAR) values are substituted into the variable's value during assignment. Variables assigned with = are expanded when they are used, so they can do things like refer to variables that aren't defined yet.

The -MM flag for g++ will generate a Makefile dependency line, e.g. foo.o: foo.cc foo.hh, but I've never found it useful. I had a phony "dependency" target that generated a single dependency file. Your idea of making a bunch of *.d files with those one line dependencies might work, but you'll end up with a lot of those files.

The error you are getting is from g++, not from make. It's because you are using $(DEPS) as if it were a single file when it's the entire list of *.d files. What happens is this line:

@$(CC) -c -MM $< > $(DEPS)

gets expanded to:

g++ -c -MM MyFile.cpp > MyFile.d stdAfx.d Main.cpp

mcdave just posted the code I have used to generate a dependency file. You can either switch to the single dependency file style, or change your -MM command to this:

@$(CC) -MM $< > $@

You may also have to fix the -include statement because I don't think it supports a list of files to include.

Answer 2

It looks like you are trying to generate a dependency file (called *.d, by your makefile rules) for each .cpp file. This is not my understanding of how a dependencies file is used.

Use the -M option to generate a single dependencies file for your project and then include the dependencies file.

DEPS = $(OUR_DIR)/make.dep

$(DEPS): $(SOURCE_TARGET)
    @$(CC) -M $(SOURCE_TARGET) > $(DEPS)

include $(DEPS)

edit Your dependency file should also depend on your headers

$(DEPS): $(SOURCE_TARGET) $(HEADER_TARGET)
    @$(CC) -M $(SOURCE_TARGET) > $(DEPS)

where HEADER_TARGET is defined the same as SOURCE_TARGET. That way, when a header file is changed the dependency file is rebuilt.