How to get writes via an mmap mapped memory pointer to flush immediately?

Question

I\'m having what appears to be a caching problem when using /dev/mem with mmap on a dual ARM processor system (Xilinx Zynq, to be exact). My configuration is asymmettric, w

Answer 1

fsync, etc. all synchronize the memory mapped region to the backing block device (e.g., file).

They do not affect the CPU data cache. You will either need to use explicit cache clean calls to flush the CPU cache to DRAM or you will have to use the ACP port.

The ACP port is supposed to be cache coherent, but I've never gotten it to work.

Here's an answer for how to flush the cache. I believe that code needs to go in your device driver. We have that code packaged in a generic "portalmem" driver. It enables your application to allocate memory that you can share with your hardware, and it provides an ioctl for flushing the cache after your application writes to it.