VHDL counter simulated using a test bench giving 'Uninitialized' for the output, how is this resolved?

前端 未结 0 407
攒了一身酷
攒了一身酷 2021-01-03 08:04

Below is a counter that is designed to represent an 8 bit binary number with 8 LEDs, it is being simulated using a test bench, however when running the simulation the output

相关标签:
回答
  • 消灭零回复
提交回复
热议问题