minimum c++ make file for linux

Question

I\'ve looking to find a simple recommended \"minimal\" c++ makefile for linux which will use g++ to compile and link a single file and h file. Ideally the make file will not

Answer 1

If it is a single file, you can type

make t

And it will invoke

g++ t.cpp -o t

This doesn't even require a Makefile in the directory, although it will get confused if you have a t.cpp and a t.c and a t.java, etc etc.

Also a real Makefile:

SOURCES := t.cpp
# Objs are all the sources, with .cpp replaced by .o
OBJS := $(SOURCES:.cpp=.o)

all: t

# Compile the binary 't' by calling the compiler with cflags, lflags, and any libs (if defined) and the list of objects.
t: $(OBJS)
    $(CC) $(CFLAGS) -o t $(OBJS) $(LFLAGS) $(LIBS)

# Get a .o from a .cpp by calling compiler with cflags and includes (if defined)
.cpp.o:
    $(CC) $(CFLAGS) $(INCLUDES) -c $<

Answer 2

florin has a good starting point. I didn't like gnu autoconf so I started there and took the concept further and called it the MagicMakefile. I have 3 versions of it from simple to more complex. The latest is now on github: https://github.com/jdkoftinoff/magicmake

Basically, it assumes you have a standard layout for the source files of your project and uses the wildcard function to create the makefile rules on the fly which are then eval'd, handling header file dependancies, cross compiling, unit tests, install, and packaging.

[edit] At this point I use cmake for all my projects since it generates useful project files for many build systems.

jeff koftinoff

Answer 3

Assuming no preconfigured system-wide make settings:

CXX = g++
CPPFLAGS =        # put pre-processor settings (-I, -D, etc) here
CXXFLAGS = -Wall  # put compiler settings here
LDFLAGS =         # put linker settings here

test: test.o
    $(CXX) -o $@ $(CXXFLAGS) $(LDFLAGS) test.o

.cpp.o:
    $(CXX) $(CPPFLAGS) $(CXXFLAGS) -c $<

test.cpp: test.h

Answer 4

SConstruct with debug option:

env = Environment()

if ARGUMENTS.get('debug', 0):
    env.Append(CCFLAGS = ' -g')

env.Program( source = "template.cpp" )

Answer 5

Some good references on creating a basic Makefile

http://en.wikipedia.org/wiki/Make_(software)

http://mrbook.org/tutorials/make/

http://www.opussoftware.com/tutorial/TutMakefile.htm

http://www.hsrl.rutgers.edu/ug/make_help.html

The first couple in particular have minimal example Makefiles like you were describing. Hope that helps.

Answer 6

Here is a generic makefile from my code snippets directory:

SOURCES=$(wildcard *.cpp)
OBJECTS=$(SOURCES:.cpp=.o)
DEPS=$(SOURCES:.cpp=.d)
BINS=$(SOURCES:.cpp=)

CFLAGS+=-MMD
CXXFLAGS+=-MMD

all: $(BINS)

.PHONY: clean

clean:
    $(RM) $(OBJECTS) $(DEPS) $(BINS)

-include $(DEPS)

As long as you have one .cpp source producing one binary, you don't need anything more. I have only used it with GNU make, and the dependency generation uses gcc syntax (also supported by icc). If you are using the SUN compilers, you need to change "-MMD" to "-xMMD". Also, ensure that the tab on the start of the line after clean: does not get changed to spaces when you paste this code or make will give you a missing separator error.