I am using RDTSCP to replace LFENCE;RDTSC sequences and also get the processor ID back so that I know when I\'m comparing TSC values after the thread was rescheduled to anot
According to this1 article which was written in 2006, the RDTSCP
instruction was first introduced in the AMD NPT Family 0Fh processors, which is now called AMD K8 Hammer. However, there are many processors that belong to this family and were released in or before 2006. I found another article, which was originally written in Japanese, but I used Google Translate to translate it to English. That article mentions that "Rev. F" of Family 0Fh supports the RDTSCP
instruction. All K8 processors that are branded as revision F (including F2 and F3) and later revisions support RDTSCP
. The older K8 processors (including some of the dual-core ones) don't support RDTSCP
.
On Intel processors, RDTSCP
is supported on Nehalem and later, Silvermont and later, and Knights Landing and later.
Footnote 1: I could only find the article using the Wayback Machine and here. It is not there anymore on the AMD website.