makefile for creating (.so) file from existing files

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无人及你
无人及你 2020-12-18 10:07

I have 4 files: 1.c, 1.h, 2.c, 2.h. I need a makefile, which will create a dynamic library (.so) from tho

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  • 2020-12-18 10:43
    CC = gcc                                # C compiler
    CFLAGS = -fPIC -Wall -Wextra -g         # C flags
    LDFLAGS = -shared                       # linking flags
    RM = rm -f                              # rm command
    TARGET_LIB = sh_main.so                 # target lib
    
    SRCS = add.c sub.c main.c               # source file
    DEPS = header.h                         # header file
    OBJS = $(SRCS:.c=.o)                    # object file
    
    .PHONY: all
    all: ${TARGET_LIB}
    
    $(TARGET_LIB): $(OBJS)
            $(CC) ${LDFLAGS} -o $@ $^       # -o $@ says, put the output of the compilation in the file named on the left side of the :
    
    $(SRCS:.c=.d):%.d:%.c
            $(CC) $(CFLAGS) -MM $< >$@      # the $< is the first item in the dependencies list, and the CFLAGS macro is defined as above
    include $(SRCS:.c=.d)
    
    .PHONY: clean
    clean:
            -${RM} ${TARGET_LIB} ${OBJS} $(SRCS:.c=.d)
    

    After the shared library created successfully. We need to install it.
    Become the root user.
    Copy the shared library into standard directory "/usr/lib".
    Run ldcofig command.

    Recompile your .c file with shared library. root@Admin:~/C/SharedLibrary# gcc -c main.c root@Admin:~/C/SharedLibrary# gcc -o main main.o sh_main.so

    root@Admin:~/C/SharedLibrary# ldd main

    Note: In my case.
    main.c: main C file
    sh_main.so: shared library.

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  • 2020-12-18 10:53

    I'm no gnu make expert, this seems reasonable to me

    CFLAGS+=-fPIC
    %.so: ; $(LINK.c) $(LDFLAGS) -shared $^ -o $@
    
    library.so: 1.o 2.o  # default target first
    
    # changes to `1.h` imply `1.o` needs to be rebuilt
    1.o: 1.h  
    2.o: 2.h
    
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  • 2020-12-18 10:54

    The simplest way is:

    CXXFLAGS += -fPIC
    CXXFLAGS += -O3
    x.so: 1.o 2.o
        $(LINK.cc) -shared $^ $(LOADLIBS) $(LDLIBS) -o $@
    

    Slightly more advanced:

    CC    = gcc
    FLAGS        = # -std=gnu99 -Iinclude
    CFLAGS       = -fPIC -g #-pedantic -Wall -Wextra -ggdb3
    LDFLAGS      = -shared
    
    DEBUGFLAGS   = -O0 -D _DEBUG
    RELEASEFLAGS = -O2 -D NDEBUG -combine -fwhole-program
    
    TARGET  = example.so
    SOURCES = $(wildcard *.c)
    HEADERS = $(wildcard *.h)
    OBJECTS = $(SOURCES:.c=.o)
    
    
    all: $(TARGET)
    
    $(TARGET): $(OBJECTS)
            $(CC) $(FLAGS) $(CFLAGS) $(DEBUGFLAGS) -o $(TARGET) $(OBJECTS)
    
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  • 2020-12-18 10:55

    Something like

     CC=gcc
     CFLAGS= -Wall -g -O -fPIC
     RM= rm -f
     .PHONY: all clean
    
     all: library.so
     clean:
          $(RM) *.o *.so
    
     library.so: 1.o 2.o
          $(LINK.c) -shared $^ -o $@
    
     1.o: 1.c 1.h 2.h
    
     2.o: 2.c 1.h 2.h
    

    But this is untested! I am assuming Linux with GNU make, and a directory containing only the source code of your library (with the above Makefile), which might be bad practice -you might want a test case- (you could have a special Makefile rule for %.pic.o depending on %.c, etc...)

    Hints: use make -p to understand the builtin rules. Then make --trace or (with remake) remake -x to understand a bit more what make is doing.

    Read also Drepper's paper: How to Write Shared Libraries, documentation of GNU make, Program Library HowTo, this answer, ...

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