According to the Wikipedia page Segmentation fault, a bus error can be caused by unaligned memory access. The article gives an example about how to trigger a bus er
It very much depends on the chip architecture. x86 and POWER are very forgiving, Sparc, Itanium and VAX throw different exceptions.
Consider the following example I have just tested on ARM9:
//Addresses 0 1 2 3 4 5 6 7 8 9
U8 u8Temp[10] = {0x11,0x22, 0x33, 0x44, 0x55, 0x66, 0x77, 0x88, 0x99, 0x00};
U32 u32Var;
u32Var = *((U32*)(u16Temp+1)); // Let's read four bytes starting from 0x22
// You would expect that here u32Var will have a value of 0x55443322 (assuming we have little endian)
// But in reallity u32Var will be 0x11443322!
// This is because we are accessing address which %4 is not 0.
It may be significantly slower to access unaligned memory (as in, several times slower).
Not all platforms even support unaligned access - x86 and x64 do, but ia64 (Itanium) does not, for example.
A compiler can emulate unaligned access (VC++ does that for pointers declared as __unaligned
on ia64, for example) - by inserting additional checks to detect the unaligned case, and loading/storing parts of the object that straddle the alignment boundary separately. That is even slower than unaligned access on platforms which natively support it, however.