I have to run these 4 commands on the terminal each time I want to execute the program using libraries.
The lines are
cc -m32 -c mylib.c
ar -rcs libmyli
The simplest tutorial to understand make files is available in Cprogramming.com. Once you are through with understanding it then you can go though the make file manual.
I think there is no more detailed procedure than the official documentation of the make command: http://www.gnu.org/software/make/manual/make.html#Overview
Basically you will have to create a target and just put your commands in it. The target could be 'all' if you want it to work when you type 'make'. A good makefile will surely use variables etc to keep it flexible over the lib/sources additions.
Something like:
program_NAME := a.out
SRCS = mylib.c prog.c
.PHONY: all
all: $(program_NAME)
$(program_NAME): $(SRCS)
ar -rcs libmylib.a mylib.o
cc -m32 prog.o -L. -lmylib
might get you started
only just started using makefiles myself and I think they are pretty tricky but once you get them working they make life a lot easier (this ones prob full of bugs but some of the more experienced SO folk will prob be able to help fix them)
As for running, make sure you save the file as 'Makefile' (case is important)
then from the cmd line (ensure you cd to the dir containing the Makefile):
$ make
thats it!
UPDATE
if the intermediate static library is superfluous you could skip it with a Makefile like this:
program_NAME := a.out
SRCS = mylib.c prog.c
OBJS := ${SRCS:.c=.o}
CFLAGS += -m32
program_INCLUDE_DIRS :=
program_LIBRARY_DIRS :=
program_LIBRARIES := mylib
CPPFLAGS += $(foreach includedir,$(program_INCLUDE_DIRS),-I$(includedir))
LDFLAGS += $(foreach librarydir,$(program_LIBRARY_DIRS),-L$(librarydir))
LDFLAGS += $(foreach library,$(program_LIBRARIES),-l$(library))
CC=cc
LINK.c := $(CC) $(CFLAGS) $(CPPFLAGS) $(LDFLAGS)
.PHONY: all
all: $(program_NAME)
$(program_NAME): $(OBJS)
$(LINK.c) $(program_OBJS) -o $(program_NAME)