Default linker setting in Makefile for linking C++ object files

Question

Consider this Makefile

% cat Makefile
main: main.o add.o

which uses cc instead of g++ to link the object

Answer 1

(GNU) Make has built-in rules, which is nice, because it is enough to give dependencies without rules:

main: main.o add.o
    # no rule, therefore use built-in rule

However the build-in rule in this case uses $(CC) for linking object files.

% make -p -f/dev/null
...
LINK.o = $(CC) $(LDFLAGS) $(TARGET_ARCH)
...
LINK.cc = $(CXX) $(CXXFLAGS) $(CPPFLAGS) $(LDFLAGS) $(TARGET_ARCH)
...
%: %.o
#  recipe to execute (built-in):
        $(LINK.o) $^ $(LOADLIBES) $(LDLIBS) -o $@

To let Make chose the correct linker, it is sufficient to set LINK.o to LINK.cc. A minimal Makefile can therefore look like

% cat Makefile
LINK.o = $(LINK.cc)
CXXFLAGS=-Wall -pedantic -std=c++0x

main: main.o add.o