GNU make: Multiple targets in a single rule [duplicate]

Answer 1

a b c are three different goals/targets with no prerequisites to it. i,e to say it will build the target whenever it is asked to.

a b c:
    echo "Creating a b c"
    touch a b c

You are asking make to build target named output that has a b c as prerequisites. So targets a b c are built sequentially and finally output is built.

Now in your case all the targets gets built invariably when either of one is called. So to avoid redundant build you will have to add prerequisites to targets a,b,c. Build target 'a' only if 'a' does not exist. Similarly for 'b' and 'c'

a b c: $@
    echo "Creating a b c"
    touch a b c

However this is not advisable. Ideally Makefile targets should be very specific.