difference in mfence and asm volatile (“” : : : “memory”)

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醉酒成梦
醉酒成梦 2021-01-30 09:12

As far as I have understood, mfence is a hardware memory barrier while asm volatile (\"\" : : : \"memory\") is a compiler barrier. But,can asm vo

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  •  被撕碎了的回忆
    2021-01-30 10:05

    • asm volatile ("" ::: "memory") is just a compiler barrier.
    • asm volatile ("mfence" ::: "memory") is both a compiler barrier and MFENCE
    • __sync_synchronize() is also a compiler barrier and a full memory barrier.

    so asm volatile ("" ::: "memory") will not prevent CPU reordering independent data instructions per se. As pointed out x86-64 has a strong memory model, but StoreLoad reordering is still possible. If a full memory barrier is needed for your algorithm to work then you neeed __sync_synchronize

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