Following this tutorial:
http://www.cs.colby.edu/maxwell/courses/tutorials/maketutor/
It has 3 files 2 of which are .c files and 1 .h fil
.c
.h
The simple Makefile definitions seem OK to me as they appear in your question. Try specifying the compiler options before the file names:
$(ODIR)/%.o: %.c $(DEPS) $(CC) $(CFLAGS) -c -o $@ $< hellomake: $(OBJ) gcc $(CFLAGS) -o $@ $^
You need to run make from the source directory.
make