How can i instantiate a module inside an if statement in verilog?

Question

if (btn[0] == 1)
    begin
        operaciones op(A,B,numop,C);
        display disp(C,led);
    end

I need to instantiate it inside this if, how can i

Answer 1

Just to add on to what @Unn has said, what you really need to do instantiate your module and then have the enable signal for your module turned on (or off) in your if statement.