PMU for multi threaded environment

Question

I am planning to measure PMU counters for L1,L2,L3 misses branch prediction misses , I have read related Intel documents but i am unsure about the below scenarios.could some one

Answer 1

i got the answers from some Intel forum, the link is below.

https://software.intel.com/en-us/forums/intel-moderncode-for-parallel-architectures/topic/673602