I am developing a VHDL program for flash interface. While compiling my program I got this error.
(clickable)
As you can see in the picture, two signal
A Google search for "Error (10028) altera" returns this Altera Quartus II help as first hit, saying:
Can't resolve multiple constant drivers for net "
" at (ID: 10028) CAUSE:
In the current design, multiple constant (non-tri-state) drivers are contending for the specified net, which was created by Quartus II Integrated Synthesis to represent one or more signals. This condition usually occurs when a Verilog Design File (.v) or VHDL Design File (.vhd) contains multiple concurrent assignments to the same signal. Quartus II Integrated Synthesis attempted to resolve the electrically equivalent assignments, but cannot resolve the contending assignments into a single equivalent driver.The message(s) immediately below this message indicate the constant drivers to the net that conflict with the net's first constant driver.
ACTION: Check the design for multiple concurrent assignments to the same signal.
The case is that in synthesis there can only be one driver for each signal, where in simulation there can be multiple for resolved signals, so you may see that the design passes compile in simulation, but doesn't in synthesis.
So look for multiple drives for flash_oe
.