Resources for logic synthesis and verification

Question

I am currently working on logic synthesis- given a high level description of a hardware I wish to convert it into a circuit of gates,flip flops etc. I am not very much familiar

Answer 1

I've found related presentation at 2010 LLVM Developers' Meeting , titled "C-to-Verilog.com : High-level synthesis using LLVM" by Nadav Rotem from Haifa University. I think it's worth to check out his ideas on presentation (slides here ).

I know just a little but about that stuff, but try to google that guy, or e-mail author, he might be a good person to ask.