signed to std_logic_vector, slice results

Question

I need to take the absolute value of a result and I am only interested in the most significant bits. This is what I have done:

data_ram_h <= std_logic_vec         


        

Answer 1

Finally I solved my doubt. Even std_logic_vector is a function, so I need 3 variables to slice the result without errors. Here what I did:

    h_tmp <= abs(signed(resize(r4(calc_cnt - 2), data_ram_h'length) + r4(calc_cnt - 1) +
                    r4(calc_cnt) + r4(calc_cnt + 1) + r4(calc_cnt + 2) -
                    r2(calc_cnt - 2) - r2(calc_cnt - 1) - r2(calc_cnt) -
                    r2(calc_cnt + 1) - r2(calc_cnt + 2)));
    h_tmp_vec <= std_logic_vector(h_tmp);
    data_ram_h <= h_tmp_vec(11 downto 4);

With the following definitions:

signal h_tmp: signed (11 downto 0);
signal h_tmp_vec: std_logic_vector (11 downto 0);
signal data_ram_h: std_logic_vector(7 downto 0);

Thanks Paebbels for your comment :)

If someone has a better way to solve it, please post it!