Why Single Stepping Instruction on X86?

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太阳男子
太阳男子 2021-01-01 00:03

So there is \"int 3\" which is an interrupt instruction used for breakpoints in debuggers.

But then there is also \"int 1\" which is used for single stepping. But wh

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  •  离开以前
    2021-01-01 00:15

    Others have already explained the distinction between the interrupt vector 1 and int 3 instruction.

    Now, if you wonder why there're multiple interrupt vectors involved in handling of debug interrupts, I think it's just because the original 8086/8088 circuitry was intended to be relatively simple and to execute relatively simple software. It had very few special interrupt vectors and the int vector 1 was only used for the single-step trap and distinguishing it from the breakpoint trap was trivial, by the interrupt vector number, that is, it was sufficient to just have distinct handlers for the vector 1 and 3. That design was carried over to the x86 CPUs that followed. The newer CPUs substantially and "quickly" extended the set of the special interrupt vectors up to about 20 to handle new exceptions and extended the debugging functionality adding several other useful interrupt vector 1 triggers on top of the original single-step trap (e.g. instruction fetch, memory/port I/O, task switch, etc). It was logical to house most of them under the same interrupt vector since they're related and not consume more vectors.

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