I2C is quite involved, supporting multiple masters on the bus. Which causes significant overhead in the bus protocol, an ACK for every byte and intentional delays to arbitrate access to the bus. Also a set maximum bus rate, 100 kHz in the original spec, 400 kHz is common today, additional 10 kHz low-speed and 3.4 Mhz high-speed modes, the 2012 spec defines a 5 Mhz ultra-fast mode.
SPI is much simpler, a single master with no bus protocol beyond a chip select and no set maximum bus rate. If the distances are short then you can go as fast as you dare. Quite fast on an interconnect between chips that are less than an inch apart.
