I\'m trying to compile a simple hello world module following this guide and I\'m confused about what the Makefile is actually doing.
obj-m += hello-1.o
all:
To compile kernel module, the make
command you normally need is in this form:
make -C /lib/modules/3.16.0-70-generic/build M=/home/test/ldd3/hello modules
in which, -C
means switching to another path.
/lib/modules/3.16.0-70-generic/
is the path to the kernel in used, and
/home/test/ldd3/hello
is where the source of your module resides.
what does the M=$(PWD) modules do?
So as I said M=$(PWD)
is simply a shell variable that stores the current path to your kernel module. make
needs to store this as it switches to the kernel build path.