How are interrupts handled on SMP?

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无人共我
无人共我 2021-02-12 03:51

How are interrupts handled on SMP (Symmeteric multiprocessor/multicore) machines? Is there only one memory management unit or more?

Say two threads, A and B running on d

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  •  我寻月下人不归
    2021-02-12 04:15

    Each logical CPU (i.e. CPU core) has it's own cr3 register, handling pointer to paging structures. The two page faults can occur either:

    • in threads of the same process
    • in threads of different processes

    If those are threads of different processes, then it's no problem. I don't know what is specific Linux's implementation of this (yes, I know it's tagged as "linux"), but there are two general algorithms to manage virtual memory in SMP environment:

    • each core holds it's own list of free physical pages and requests some more when all of pages on it's own list are allocated
    • all cores use the same list of free pages, protected by some kind of lock (usually spinlock is enough in such case), which is of course slower solution

    The same code (#PF handler) can execute simultaneously on two different cores, that's not a problem. If threads use two different VASes1, then their page faults are just handled symmetrically. If the page faults occurs within single VAS, it's still no problem, until the #PFs are caused by access to the same page. In such case, each page in VAS should be protected by a spinlock (or just #PF in given VAS can be protected by single lock - this way reduces memory overhead, but removes the possibility to run two #PF handlers simultaneously).

    According to this answer, only in NUMA systems, each CPU core has it's own MMU; in other systems, every physical processor has it's own MMU, as well as TLB to handle different paging structures referenced by different values of cr3 register.


    1. VAS = Virtual Address Space

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