In this article: http://www.drdobbs.com/parallel/volatile-vs-volatile/212701484?pgno=2
says, that we can\'t do any optimization for volatile
, even such as (where: <
volatile
ensures that the variable won't be "cached" in CPU register. CPU cache is transparent to the programmer and if another CPU writes to the memory mapped by another CPU's cache, the second CPU's cache gets invalidated, therefore it will reload the value from the memory again during the next access.
Something about Cache coherence
As for the external memory writes (via DMA or another CPU-independent channel), you might need to flush the cache manually (see this SO question)
C Standard §6.7.3 7:
What constitutes an access to an object that has volatile-qualified type is implementation-defined.