How does one calculate the effect of L1 and L2 cache\'s on the overall CPI of the processor given base CPI, miss rate % of L1 and L2 caches and access times of L1, L2, and the m
I think you are not taking into account the Average Number of Memory Accesses per Instruction (AMAPI).
For example, if there are 30% of load/store instructions, this number would be 1.3 (one access to fetch the instruction and 0.3 due to memory access instructions)
So
CPI = BaseCPI + (AMAT - ideal memory access time) x AMAPI
Being AMAT the Average Memory Access Time. For a two-level hierarcchy:
AMAT = L1_hit_latency + L1_miss_rate x (L2_hit_latency + L2_miss_rate x Main_Memory_latency)