Generate all project dependencies in a single file using gcc -MM flag

Question

I want to generate a single dependency file which consists of all the dependencies of source files using gcc -M flags through Makefile. I googled for this solution but, all the

Answer 1

I think is is expected behaviour for gcc -M, where typically you'd do something like this:

FOO_SOURCES= \
    src/foo.c \
    src/bar.c

FOO_OBJECTS = $(FOO_SOURCES:.c=.o)
FOO_DEPS = $(FOO_OBJECTS:.o=.d)

(... lots of targets ...)

-include $(FOO_DEPS)

Note, -include not include as the dependencies will obviously not exist until at least one build has been run. Regardless, dependencies are generated on a per module basis.

Also note that gcc -M does not always work as you would expect it to work, broadly depending on what version of gcc you happen to be using.

I think what you want is something called makedep, which does what you want without sed hackery in the makefile.