Understanding Makefile with .c=.o and $<

Question

This is my first Makefile, and I can\'t figure out some of the syntax used. The questions are marked below:

C := gcc

CFLAGS := -Wall -Werror -std=

PROG := progr         


        

Answer 1

You didn't specify exactly which variant of make you're using -- there are many. I'm going to assume you are using GNU make, the most widely used variant.

In GNU make, $(SRCS:.c=.o) is a substitution reference, and it means "the value of the SRCS variable, where .c is replaced by .o when it appears at the end of a word." In your example, SRCS has the value program_1.c program_2.c program_3.c, so $(SRCS:.c=.o) means program_1.o program_2.o program_3.o.

The .c.o is an example of what's known an old-fashioned suffix rule. It tells GNU make "here's how to build a .o file from a .c file with the same name." The modern equivalent is a pattern rule which would look the same except to use %.o: %.c in place of .c.o.

Finally, $< is an automatic variable which means "the name of the first prerequisite".