I looking for the info that can help in estimating interrupt latencies on x86 CPUs. The very usefull paper was found at \"datasheets.chipdb.org/Intel/x86/386/technote/2153.pdf\"
If agner fog's optimization manuals (supplimented with the intel developer manuals) don't have anything, its unlikely anyone/anything else will(save for some internal intel/amd data): http://www.agner.org/optimize/